GPU Physical Verification Design Engineer

Summary Posted: Jan 9, 2023 Role Number: 200453772 Do you love creating sophisticated solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient GPU! You’ll ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions! Joining this group means crafting and building the technology that fuels Apple’s devices. Together, we enable our customers to do all the things they love with their devices. This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for realizing complete physical design verification closure from early design planning to tapeout. Key Qualifications Key Qualifications We value ability in all aspects of ASIC integration including Floorplanning, Clock and Power distribution, global signal planning, I/O planning and hard IP integration. Deep experience at full chip with configuration, methodology, and analysis of physical design verification checks: DRC, LVS, ERC, Process ANT, PERC, and ESD. Background with top to block correlation and reporting is required. Knowledge in general partition PNR flow and understanding how to support partition owners in solving physical design verification issues. Familiar with hierarchical design approach, and techniques that enable physical design verification that is correct by construction. Familiar with GDS assembly, GDS requirements for hard macros. Depth of expertise on integrating IP from both internal and external vendors and able to specify and drive IP requirements in the physical domain. Experience with large subsystem designs (>20M gates) with frequencies in excess of 1GHz applying innovative technologies. Experience in technical project leadership and achieving results that have had impact on project completion and objectives. Track record of applying creative thinking to strategically solve problems that have impact for a project, group, or organization. Consistent record in solving complex PD and multi-functional problems, achieving results directly and/or leading a team of engineers to innovate and achieve extraordinary GPU designs. From a CAD tool perspective, experience with Floorplanning tools, P&R flows, mainstream Physical Design Verification tools (e.g. Mentor) is required. Familiar with TCL scripting. Description Description • Work closely with FE team to understand chip architecture and drive physical verification aspects early in the design cycle. • Work with physical design team, drive methodologies and “best known methods” to streamline physical design work, come up with guidelines and checklists, drive execution, and track progress while offering physical verification support. • Be focal point for all things PDV, set goals and breakthroughs, plan short and long-term work, understand dependencies between different domains like top, power integrity, and PNR. • Lead and resolve design and flow issues related to physical design, identify potential solutions and drive execution. • Communicate and drive the needs of Physical Design Verification with multi-functional teams that will enable achieving the goals of the back-end design for the project. Education & Experience Education & Experience We are looking for candidates with a minimum of BS + 10 years of relevant experience. Additional Requirements Additional Requirements