Formal Verification Engineer

Summary Posted: Oct 22, 2023 Role Number: 200023014 Ready for an intellectual challenge that combines Mathematics and CS theory in the context of hardware development? Keep reading. In this role you will be responsible for developing mathematical proofs using model checking tools, to find RTL(Verilog) bugs or prove their absence Not in the Formal domain? No worries, we offer thorough training to learn the theory and practice directly from our team experts Key Qualifications Key Qualifications Excellent graduates from leading universities Analytical thinking Highly motivated Description Description In this role you will be responsible for developing mathematical proofs using model checking tools, to find RTL(Verilog) bugs or prove their absence . Education & Experience Education & Experience B.Sc. in Computer Science, Electrical/Computer Engineering, M.Sc/PhD Mathematics Additional Requirements Additional Requirements