Staff Engineer, ASIC Validation

CA Pay Range (Annual):$130,900.00 - $243,100.00Non-CA Pay Range (Annual):$117,800.00 - $218,800.00At Infinera, your base pay is one part of your total compensation package. Your actual base pay will depend on your skills, qualifications, experience, and location. This role may be eligible for equity grants, discretionary bonuses, or commission payments. The amount of these incentives is based on the terms of the Company’s incentive plans, the Company’s financial performance, and/or individual employee job performance.Infinera also offers paid leave, medical, dental, and vision coverage, 401(k), life, and disability insurance and toeligible employees.Infinera is the global supplier of innovative networking solutions. Our customers include the leading service providers, data center operators, internet content providers (ICPs), cable operators, enterprises, and government agencies worldwide, including 9 of the top 10 Tier 1 service providers and 6 of the top 7 ICPs. We design, develop and deliver hardware and software for fiber-based connectivity solutions that span access, aggregation, metro, long haul, and submarine network. Our industry-leading, trendsetting edge-to-core solutions provide the foundation for many of the world’s largest and most demanding networks that generate billions in service revenue for our customers.Your Key Responsibilities Would Include:In this role, you will have complete ownership of specific tasks – validation env development and/or validation & characterization of specified functional features. You will work under the guidance of a person managing overall ASIC/FPGA validation, and you will have ownership of a subset of tasks. You will have full ownership of technical quality and timely completion of a project.What you will be doing:Participate in the specification of validation env & component selection required to carry out validationWork on validation env if requiredDefine & own validation plan for a subset of featuresParticipate in system-level debug to isolate issues related to ASIC/FPGAParticipate in full chip validation & characterization effortsParticipate in process & checklist definition & improvementsMentor team membersEducation & Experience Necessary For Success:Experience: 6+ yrs with MS & 8+ yrs with BS, of which 3-4 yrs of Mgmt experienceExperience with post-silicon validationExperience with scripting languages, preferably PythonBasic RTL design & verification skills & proficiency in DSP logic validation and DSP design constructsShould be able to review the arch, requirements and micro-arch detailsGood communication and interpersonal skills.Ability to contribute towards improving validation methodologyExplore new methodologies to improve quality and reduce pain points in the project execution#LI-SR2Infinera is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, sexual orientation, gender identity, national origin, disability status, protected veteran status, or any other characteristic protected by law. Infinera complies with all applicable state and local laws governing nondiscrimination in employment.