Senior ASIC Design Engineer

NVIDIA MMPLEX display team delivers cutting-edge IP solutions to multiple NVIDIA product lines, for example: GeForce, automotive, etc. We are looking to grow our teams with the smartest people in the world. Join us if you want to learn about the world’s leading IP technology and development process.What you'll be doing:Read design specs to understand high-level requirements and compose micro architecture documents before IP implementation.Use advanced ASIC design methodology and flow to deliver a perfect IP block.Refine IP from area/timing/power etc perspectiveWork with the verification team and fix design bugsLearn how to packetize an IP and deliver for different chipsSupport features brought up in FPGA, Emulation, SiliconWhat we need to see:BS/MS in electrical/computer engineering and related.At least 3+ years’ experience in ASIC design.Strong design/implementation skills in Verilog. Solid understanding of microarchitecture and timing/power optimization skills of digital design. Understanding coverage & assertions.Strong debug capabilityFluent English (both written and spoken) and excellent communication skillsDemonstrated ability to work independently as well as in a multi-disciplinary group environmentWays to stand out from the crowd:Expert analytical skillsStrong script skills in either perl or python, understand MakefileGood understanding of C/C++ and MakefileFamiliar with DisplayPort/HDMI, display pixel processing unit like scalar and color space conversion, DSC, is a big plusExperience with FPGA/QT, silicon bringup