R&D Engineer IC Design

Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:In this position you will use your physical design expertise to do physical implementation of challenging designs in latest technology nodes . The person should have hands-on experience on RTL to GDS  implementation of multi million gates including but not limited to  floorplanning  place and route, STA, physical verification. Full chip assembly and experience on spice simulation is a plus.Job Requirements:15+ years hands on experience on RTL to GDS physical design flow. Should have experience in handling blocks with a large number of macros , floorplanning , CTS , timing and congestion debugging.Extensive experience STA and timing closure. Strong understanding of STA timing concepts and overall timing closure cycle.Strong Perl and TCL scripting skills   Strong communication skillsPlus:Hands-on experience on hierarchical top level  floorplanning, IO ring design, place and route, clock tree building, STA is preferable.Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.