Senior Design Engineer

We are looking for a senior design engineer for the SOC/IP design team in Taiwan. The team is involved in SOC project and IP developments. In this position, you will have the chance to work on SOC design as well as processors, accelerators, multimedia, interconnect, bridge, high speed IO IPs for our SOC chips.What you will be doing:SOC or IP level front-end design, quality checks, and co-work with verification engineers to ensure that the design is functional.Analyze design trade-offs and optimize design based on features, requirements, and system limitations.What we need to see:Masters Degree in EE, CS or CE or equivalent work experience.3+ years of industry experience.Proficiency with Verilog and System Verilog.IP level design experience.Familiar with ASIC design flows.Excellent analytical, written, and verbal interpersonal skills and ability to work as part of a team.Ways to stand out from the crowd:Experience in RISC-V CPU/accelerators/subsystem, High Definition Audio subsystem, security engines, DP/HDMI, PCIE MAC, Ethernet MAC.Familiarity with SoC concepts such as CPU, memory, interconnects, clock/reset, high speed IO protocols, security, etc.Experience in writing C++/SystemC models.Experience working in a globally distributed team.Proficient scripting experience in Python, Perl, tcl, Make, shell.