Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:Work with business units marketing and IC design teams to select the optimum package solution on cost, performance, manufacturability, and reliability.Work with IC design, system design, package SI/PI & thermal engineering teams to design custom packages using Cadence APD for FCBGA, WLBGA & WLCSP productsEnsure designed packages meet CPI, SI/PI, and thermal requirements of silicon productsManage IC packaging activity from concept through development, qualification through high volume productionBe a specialist and able to define assembly BOM, process, troubleshoot, support on packaging issues on packaging issuesCreate package design documentation and assembly instructionsWork close with QA and customers to resolve quality issuesInterface with packaging assembly and substrate suppliers for new product bring-up, qualification and production rampInterface with other operations functional groups such as product engineering, foundry, test, and QAParticipate in package technology development and/or other business productivity projects which have broad team impact (e.g. assembly process enhancement, new technology/structure development etc.)Interface with tier #1 external customers for custom ASIC programs or as needed for development support, quality and/or other issue resolutionSupport NPI bring-up, package qualification, and sustain support in production + multi-source activities for capacity, cost, & manufacturing flexibility needsJob RequirementsExperience : Bachelors and 12+ years of related experience; at this level a post-graduate degree is typically expected or Masters degree and 10+ years of related experience or PhD and 7+ years of related experienceDeep understanding of signal integrity and power integrity concepts such as characteristic impedance, s-parameters (RL, IL, FEXT/NEXT etc.), power plane impedance profile requirements and optimization etc.Strong authority on Cadence APD for custom substrate designHands-on expertise of assembly processes for flipchip, MCM, WLBGA and WLCSP packages for advanced node silicon products (16nm, 7nm, 5nm and beyond)Good understanding of materials as related to Chip Packaging Interaction (CPI)Familiarity with wafer BEOL as related to CPI (top metal, AP, passivation, UBM, bumping etc.)Additional Job Description:Compensation and BenefitsThe annual base salary range for this position is $126,000 - $210,000. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
View Original Job Posting