Scan System EE Technical Lead

Scan System EE Technical LeadDescription -As a member of the Scan Asset team, provide EE and System Engineering technical leadership to solve scan system issues. Understand critical timing and sequencing issues necessary to deliver new scan bars. Function as a part of cross-discipline team to understand and resolve system issues that often involve firmware, mechanical and electrical elements.Responsibilities: Provide EE technical leadership in understanding critical timing and sequencing of scan sensors, integrated scan bars and supporting ASICs Collaborate with other technical resources to root-cause complex scan system issues Provide mentoring, design review expertise for scan electrical systems on NPI Programs (designed by HPPK partners) Leads efforts to root-cause complex EE and System issues; forges partnership with other technical resources, as required Design, troubleshoot and validate solutions for EE related regulatory and EMC Tests. Collaborates and communicates with management, internal, and outsourced development partners regarding design status, project progress, and issue resolution. HPPK (HP South Korea) is a key partner. Leads a project team of other electrical engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for moderately- complex products. Represents the electrical/system team for all phases of larger and more-complex development projects. Manages and expands relationships with internal and outsourced development partners on electrical hardware design and development. Drives innovation and integration of new technologies into projects and activities in the scan asset organization. Provides guidance and mentoring to less- experienced staff members.Education and Experience Required: Bachelor's or Master's degree in Electrical Engineering.Typically 6-10 years experience.Knowledge and Skills: Using electrical design tools and software packages. Excellent analytical and problem solving skills (experience with scan and imaging systems, highly desirable) Experience in overall architecture of electronic hardware for products and solutions. (experience with scan related sensors and ASICs, highly desirable) Designing and integrating electronic components, integrated circuitry, and algorithms into overall architecture. Evaluating and proposing forms of empirical analysis, modeling and testing methodologies to validate component, circuit, and hardware designs and thermal/emissions management. Excellent written and verbal communication skills; mastery in English and local language. Ability to effectively communicate product architectures, design proposals and negotiate options at senior management levels.Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets. The typical base pay range for this role across the U.S. is $116,900 to $180,000 annually with additional opportunities for pay in the form of bonus and/or equity. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. Your recruiter can share more about the specific salary range for the job location during the hiring process.https://hp.wd5.myworkdayjobs.com/ExternalCareerSite/job/Vancouver-Washington-United-States-of-America/R-D-Firmware-Integration-Engineer_3115429-1Job -EngineeringSchedule -Full timeShift -No shift premium (United States of America)Travel -NoRelocation -YesEEO Tagline - HP Inc. is EEO F/M/Protected Veteran/ Individual with Disabilities.