DFT Engineer

Company: Broadcom
Company: Broadcom
Location: USA-CA San Jose Innovation Drive
Commitment: Full time
Posted on: 2023-05-03 17:03
Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:Broadcom’s CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most complex and cutting edge network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT architecture, to implementation, verification, timing closure, ATE pattern bringup. . You will also drive/push state of the art in the areas of testability, debug and quality, in order to aggressively deliver low DPPM's, while optimizing the cost for test.ResponsibilitiesDrive the test quality of the products from Design to ProductionParticipate/contribute in silicon bring-up, characterization, and silicon testDefine and implement various DFx featuresRequirementsKnowledge of Testability techniques and features (SCAN, Built-in-Self-Tests, Loop-Backs etc.) covering digital logic domain, embedded memories and PHY/IO’sScan flow development, ATPG pattern generation, verification and coverage analysisExperience working with Mentor/Siemens DFT Tessent tool for scan/MBIST/bscan/IJTAG insertion and verificationExperience working with Cadence DFT tools (Modus and Genus)Well versed in JTAG/1500/1687 networks and  BSDL, ICL and PDL knowledgeStrong knowledge of logic & circuit design fundamentals is neededWorking knowledge of TCL, perlExperience in implementation of MBIST for memories and knowledge of repair schemes, algorithmsExperience or working knowledge of SERDES, Analog /mixed-signal DFT techniques (like IOBIST, loop-backs etc..) is a plusExperience in implementation of MBIST for memories and knowledge of repair schemes, algorithms is a mustPost Silicon experience in Pattern conversion for Testers, Pattern Bring-up & Debug, Silicon Characterization etc. is a plusExperience or familiarity in back-end chip design, Timing, CDC flows is a plusStrong Pre/Post Silicon debugging, analytical and independent problem solving ability.Must be a team player with good verbal and written communication skills.Must be self-driven engineer with good project management and organizational skills to deliver high quality output in a timely manner. Experience : Bachelors and 12+ years of related experience; at this level a post-graduate degree is typically expected or Masters degree and 10+ years of related experience or PhD and 7+ years of related experienceAdditional Job Description:Compensation and BenefitsThe annual base salary range for this position is $126,000 - $210,000.This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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