Senior Design Verification Engineer - Hardware

NVIDIA is looking for senior verification engineer to join us in architecting world class security IPs. We are a team responsible for building various security IP hardware for NVIDIA GPU and Tegra SOC.As a senior verification specialist for the IP team, you will focus on the architecture definition of the verification framework, you will work with architects and designers to define testplans, to verify the IP, to build solutions to improve the verification efficiency, to explore sophisticated verification methodologies, such as formal tools, to verify critical security features of the CPU, deliver bug-free IP to both GPU and Tegra SOC, to help bringing NVIDIA products to another level. You will be able to work with world-class architects and designers in the industry to develop and verify in-house CPU and security IPs.What you'll be doing:Participate in the research of verification methodology to improve automation and productivity to produce NVIDIA's new high-quality state of the art products.Read IAS and design specs to understand the design requirement and build corresponding testplan. Review the testplan with arch/design engineers.Responses to build block/IP testbench based on UVM methodology.The responsibilities include building test run and regression flow. Triage failures in regression and help designer root cause the bug.Work includes Build various metrics (passing rate, functional coverage, etc) and monitor its health.Take SOC verification on fullchip test environment for IPs.Analyse functional/code coverage result and identify the coverage holes. Work with design engineer to improve the coverage score.Deploy sophisticated verification methodology and infrastructure of the SOC/IP.What we need to see:BS / MS in electrical / computer engineering and related or equivalent experience.3+ years (MS) or 5+ years (BS) working experience.Familiar with advance verification methodology (UVM, VMM, OVM, etc), tools and flow.Fully experienced verification flow, including testplan, test, coverage model, testbench, BFM modeling.Deep understanding in Verilog and HVL (High-level Verification Language).Ways to stand out from the crowd:Strong programming skills in Perl and C/C++is huge plus.Having good arch/design experience in CPU or security IP (AES/SHA/PKC) is huge plus.At least good at one of the script programming: Perl, Shell, Ruby, Python, etc.Fluent English (both written and spoken) and excellent interpersonal skills.Proven track record to work independently as well as in a multi-disciplinary group environmentStrong analytical skills.