Astera Labs Inc., a semiconductor company headquartered in the heart of California’s Silicon Valley, is a leader in purpose-built connectivity solutions for data-centric systems throughout the data center. Partnering with leading processor vendors, cloud service providers, seasoned investors, and world-class manufacturing companies, Astera Labs is helping customers remove performance bottlenecks in data-intensive systems that are limiting the true potential of applications such as artificial intelligence and machine learning. The company’s product portfolio includes system-aware semiconductor integrated circuits, boards, and services to enable robust CXL, PCIe, and Ethernet connectivity.
Job Description:
As an Astera Labs Senior Systems Engineer, you will be developing and debugging Server Systems for validation and productization of future looking memory technologies for Astera Labs CXL solutions.
Basic qualifications:
Bachelors in Electrical Engineering / Electronics / Computer Science or related fields.
Required experience :
5+ years experience in a system validation role
Strong C or Python/Perl development experience in Linux environments
Strong experience in implementing Automation Infrastructure for regressions and CI/CD
Experience with regression infrastructure and automation on HW platforms
Good understanding of BIOS/PCIe device/OS interactions
Good understanding of BIOS, BMC, I2C and x86_64 Server Management
Preferred experience:
Basic understanding of DDR Memory, Memory Controllers
Familiarity with PCIe/CXL technologies
Familiarity with PyTest kind of frameworks
Ability to build and upstream Linux kernel changes
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
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