CAD Engineer- Signoff, PNR

Summary Posted: Jun 3, 2024 Role Number: 200553747 Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices! The Signoff Engineer ensures that all critical, necessary, and appropriate verification and analysis work has been performed on a design before tapeout. This high-visibility position is responsible for the definition, development, and implementation of signoff requirements for PNR construction flows, and analysis for STA, Noise, and Clocks of high-volume SOC. We work closely with other teams in the organization to verify that the EDA flows and tools are set up and run correctly during the project, and all signoff criteria are met at the end of the project. This role also requires direct interaction with technology, CAD, and design groups to provide frontline support for enablement, enhancement, and debug requests. Description Description - Determine signoff criteria for construction and all analysis flows, including boolean equivalence and power validation - Drive initiatives to improve signoff methodologies. - Partner with PNR design, CAD, Technology, and Power teams - Participate in technology and design reviews - Develop and maintain signoff checks and scripts for signoff verification - Resolve signoff timing requirements across all modes and corners - Verification of CAD flows - Drive signoff reviews with design teams - Enable design teams for signoff closure and signoff scheduling. Signature delegation and tracking . - Ability to work in a demanding, team-oriented environment - Support and debug signoff flow issues Minimum Qualifications Minimum Qualifications Proficient in programming using Python, Perl or Tcl Experience with PNR tools such as ICC, EDI, Primetime, or Tempus Excellent communication and collaborative skills Minimum requirement of BS + 10 years of relevant industry experience Key Qualifications Key Qualifications Preferred Qualifications Preferred Qualifications Demonstrated experience in areas of PNR design flows Experience in synthesis, floor planning, placement, and routing Good understanding of STA and Noise analysis flows Experience in timing closure, clock tree construction, and signal integrity Understanding of submicron technology nodes and the associated physical design complexities Understanding of tradeoffs to meet PPA (power, performance, area) targets Education & Experience Education & Experience Additional Requirements Additional Requirements More Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.