Principal HVM Product Engineer

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with hyperscalers and the data center ecosystem, we are an innovation leader of products that are flexible, interoperable, and reliable. We are headquartered in the heart of California’s Silicon Valley, with R&D centers and offices in Taiwan, China, Vancouver and Toronto, Canada, and Haifa, Israel.  Job Description: As an Astera Labs Principal HVM Product Engineering, you will support existing products already in HVM (high volume manufacturing) at our Asia OSAT partners. Maintaining smooth manufacturing to ensure on-time customer shipments is one key objective. In this role, you will complement the New Product Introduction Product Engineers as products are released into production and own the engineering manufacturing during mass production. Basic Qualifications: Minimum of 8 years of experience in product and/or test engineering in the field of semiconductor industry. Strong academic/technical background in electrical or computer engineering; bachelor’s is required; MS preferred. Proven track record continuing seamless production of semiconductor products partnering with OSATs supporting high volume manufacturing through the complete product lifecycle. Strong problem-solving skills that involve system-level analysis with test hardware, test programs, and DUT. Digital and analog circuit-level understanding for DUT. Excellent team player with great communication skills. Professional attitude with the ability to prioritize a dynamic list of multiple tasks. Required Experience : Hands-on experience with using the Advantest 93k ATE platform with specific skills in updating ATE test programs for wafer sort and final test solutions. Hands-on knowledge of NRZ/PAM4 SerDes protocols like PCIe, Ethernet (25G and above), etc., and/or memory interfaces such as (LP)DDR5/4/3. Detailed mindset monitoring device ATE test yields, ATE test time, device quality, and rolling out new ATE test programs using consistent BKMs. Strong data analysis skills using tools such as JMP or Spotfire to calculate limits and conclude. Energetic work mindset meeting the demands of shipping quality parts to Astera Labs’ customers through the manufacturing stage of development. Preferred experience: Working with silicon validation teams to ensure device performance meets production requirements. Firmware development in C/C++, scripting in Python, or other equivalent programming experience. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.