Summary Posted: Jan 16, 2024 Role Number: 200533254 Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn’t have imagined, and now, can’t imagine living without. It’s the diversity of those people and their ideas that inspires the innovation that runs through everything we do. Key Qualifications Key Qualifications Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field. Experience and/or education must include: Digital Design concepts Synthesis and timing closure Physical Design Coding in Verilog Optimizing power, performance and area Description Description APPLE INC has the following available in West Lake Hills, Texas. Design and implement IP blocks to maintain System-on-Chip (SoC) infrastructure. Build integration specifications for ASIC design projects. Integrate and optimize memories and hard macros required for the block. Run synthesis, netlist generation, and closing the block's timing. Implement internal and external IP integration. Develop and maintain methodology, flows, checks for the design. Collaborate with Chip Architecture, Design Verification, Physical Design, DFT, and power teams to achieve first tape out success on designs. Work with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design process. 40 hours/week.
Apple is an Equal Employment Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Education & Experience Education & Experience Additional Requirements Additional Requirements
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