Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:Graduate with Verification experience of 10-14 years / Master Degree with 8+ Experience with below Skill Set : Wide exposure to chip level (SoC) verification and SystemVerilog/UVM methodology a MUSTExpertise in Co-Simulations (HW/SW) Flow and debugsExposure to Test Bench Accelerators /Emulation Platforms.Expertise in the High Speed bus protocols desired - PCIe, Ethernet, AXI4.0 Exposure the Chip level Interconnect/Testability Functions - JTAG, I2C, PLLs etcExperience in GLS, Coverage Driven Methodology, ATE Good exposure in Simulation tool usage for simulation (VCS) and waveform debug(Verdi) and formal tools like Jasper.Have lots of debugging skills to quickly scan & identify issues in Sverilog/Verilog, C-code Exposure to any one of the scripting languages - Perl or Python or SED/Awk Good Problem Solving Skills.Education Requirements BE/BTech/ME/MTech/MS Communication Engineering and/or Electronics, VLSI from reputed university preferably with distinctionBroadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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